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features general features operating temperature from -25 c ~ 85 c ? critical parameters are guaranteed over temperature and supply voltage ? cc supply 2.4 to 3.6 volts miniature package height: 2.5 mm ? idth: 8.0 mm depth: 3.0 mm integrated remote control led driver input/output interface voltage of 1.5 v integrated emi shield led stuck-high protection designed to accommodate light loss with cosmetic windows iec 825-class 1 eye safe interface to various super i/o and controller devices lead free package irda features fully compliant to irda 1.4 physical layer low power specifications from 9.6 kbit/s to 4.0 mb/s link distance up to 50 cm typically complete shutdown for txd_irda, rxd_irda and pin diode low power consumption low shutdown current remote control features wide angle and high radiant intensity spectrally suited to remote control function at 890 nm typically typical link distance up to 8 meters (on-axis) applications mobile data communication and universal remote control ? obile phones pdas webpads description the HSDL-3021 is a new generation low profile high speed enhanced infrared (ir) transceiver module that provides the capability of (1) interface between logic and ir signals for through-air, serial, half- duplex ir data link, and (2) ir remote control transmission for universal remote control applications. the HSDL-3021 can be used for irda as well as remote control application without the need of any additional external components for multiplexing. the HSDL-3021 is fully compliant to irda?physical layer specification version 1.4 low power from 9.6 kbit/s to 4.0 mbit/s (fir) and iec825 class 1 eye safety standards. the HSDL-3021 can be shut down completely to achieve very low power consumption. in the shut- down mode, the pin diode will be inactive and thus produce very little photocurrent even under very bright ambient light. it is also designed to interface to input/output logic circuits as low as 1.5 v. these features are ideal for battery operated mobile devices such as pdas and mobile phones that require low power consumption. HSDL-3021 irda data compliant low power 4.0 mbit/s with remote control infrared transceiver data sheet
2 order information part number packaging type package quantity HSDL-3021-021 tape and reel front option 2500 marking information the unit is marked with ?ywll?on the shield y = year w = work week ll = lot information figure 1. HSDL-3021 block diagram. figure 2. pinout. application support information the application engineering group is available to assist you with the application design associated with HSDL-3021 infrared transceiver module. you can contact them through your local sales representatives for additional details. 87654321 led driver rx pulse shaper 8 gnd shield 7 txd_rc 6 v cc 5 sd 4 rxd 3 txd_ir 2 iov cc iov cc 1 leda cx1 cx2 r1 v cc cx3 cx4 cx5 r2 vled
3 i/o pins configuration table pin symbol description i/o type notes 1 leda led anode note 1 2 iov cc input/output asic voltage note 2 3 txd_ir irda transmitter data input input. active high note 3 4 rxd irda receive data output. active low note 4 5s d shutdown input. active high note 5 6v cc supply voltage note 6 7 txd_rc rc transmitter data input input. active high note 7 8 gnd ground note 8 shield emi shield note 9 notes: 1. tied through external resistor, r2, to vled. refer to the table below for recommended series resistor value. 2. connect to asic logic controller supply voltage or v cc . the voltage at this pin should be equal to or less than v cc . 3. this pin is used to transmit serial data when sd pin is low. if held high for longer than 50 s, the led is turned off. do not float this pin. 4. this pin is capable of driving a standard cmos or ttl load. no external pull-up or pull-down resistor is required. the pin is in tri-state when the transceiver is in shutdown mode. 5. complete shutdown of ic and pin diode. the pin is used for setting ir receiver bandwidth, range of ir led current and rc driv e programming mode. refer to section on ?andwidth selection timing?and ?emote control drive modes?for more information. do not float this pin. *** 6. regulated, 2.4 v to 3.6 v. 7. logic high turns on the rc led. if held high longer than 50 s, the rc led is turned off. do not float the pin. 8. connect to system ground. 9. connect to system ground via a low inductance trace. for best performance, do not connect directly to the transceiver gnd pin . recommended application circuit components component recommended value note r1 4.7 ? , 5%, 0.25 watt r2 2.7 ? , for 2.4 < vled 2.7 v; 3.3 ? , for 2.7 < vled 3.0 v 3.9 ? , for 3.0 < vled 3.3 v 4.7 ? , for 3.3 < vled 3.6 v 5.6 ? , for 3.6 < vled 4.2 v 10 ? , for 4.2 < vled 5 v cx1, cx3, cx5 100 nf, 20%, x7r ceramic 1 cx2, cx4 4.7 f, 20%, tantalum 1 note: 1. cx1, cx2, cx3 & cx4 must be placed within 0.7 cm of HSDL-3021 to obtain optimum noise immunity. cautions: the bicmos inherent to the design of this component increases the component? susceptibility to damage from electrostatic discharge (esd). it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd.
4 recommended operating conditions parameter symbol min. typ. max. units conditions operating temperature t a -25 +85 c supply voltage v cc 2.4 3.6 v input/output voltage iov cc 1.5 3.6 v logic input voltage logic high v ih iov cc - 0.5 iov cc v for txd, sd/mode logic low v il 00.5v 0.0090 500 for in-band signals 115.2 kbit/s [3] receiver input logic high ei h mw/cm 2 irradiance 0.0225 500 0.576 mbit/s in-band signals 4.0 mbit/s [3] logic low ei l 0.3 w/cm 2 for in-band signals [3] ir led (logic high) current pulse i leda 65 ma amplitude ?sir mode ir led (logic high) current pulse i leda 150 ma amplitude ?mir/fir mode rc led (logic high) current pulse i leda 250 ma amplitude receiver data rate 0.0096 4.0 mbit/s ambient light see irda serial infrared physical layer link specification, appendix a for ambient levels note: 3. an in-band optical signal is a pulse/sequence where the peak wavelength, l p, is defined as 850 l p 900 nm, and the pulse characteristics are compliant with the irda serial infrared physical layer link specification v1.4. absolute maximum ratings for implementations where case to ambient thermal resistance is 50 c/w. parameter symbol min. max. units conditions storage temperature t s -40 +100 c operating temperature t a -25 +85 c led anode voltage v leda 06.5v supply voltage v cc 06 v input voltage: txd, sd/mode v i 05.5v input/output supply voltage: rxd iov cc 06 v ir led current pulse amplitude i (vled)ir 190 ma 25% duty cycle, 90 s pulse width rc led current pulse amplitude i (vled)rc 400 ma 10% duty cycle, 90 s pulse width
5 electrical and optical specifications specifications (min. & max. values) hold over the recommended operating conditions unless otherwise noted. unspecified test conditions may be anywhere in their operating range. all typical values (typ.) are at 25 c with v cc set to 3.0 v and iov cc set to 1.8 v unless otherwise noted. parameter symbol min. typ. max. units conditions receiver viewing angle 2 q 1/2 30 peak sensitivity wavelength l p 885 nm rxd_irda output logic high v oh iov cc -0.5 iov cc vi oh = -200 a, ei 0.3 voltage w/cm 2 logic low v ol 00.4v rxd_irda pulse width (sir) [4] t rpw (sir) 1 4 s q 1/2 15 , c l = 9 pf rxd_irda pulse width (mir) [4] t rpw (mir) 100 500 ns q 1/2 15 , c l = 9 pf rxd_irda pulse width (single) (fir) [4] t rpw (fir) 80 175 ns q 1/2 15 , c l = 9 pf rxd_irda pulse width (double) (fir) [4] t rpw (fir) 200 290 ns q 1/2 15 , c l = 9 pf rxd_irda rise & fall times tr, tf 40 ns c l = 9 pf receiver latency time [5] t l 100 s ei = 9.0 w/cm 2 receiver wake up time [6] t rw 200 s ei = 10 mw/cm 2 infrared (ir) transmitter ir radiant intensity (sir mode) i eh 4 mw/sr ir_i leda = 65 ma, q 1/2 15 , txd_ir v ih , t a = 25 c ir radiant intensity (mir/fir mode) i eh 10 mw/sr ir_i leda = 150 ma, q 1/2 15 , txd_ir v ih , t a = 25 c ir viewing angle 2 q 1/2 30 60 ir peak wavelength l p 885 nm txd_irda logic levels high v ih iov cc - 0.5 iov cc v low v il 00.5v txd_irda input current high i h 0.02 av i v ih low i l -0.02 a0 v i v il wake up time [7] t tw 180 ns maximum optical pulse width [8] t pw (max) 25 50 s txd pulse width (sir) t pw (sir) 1.6 st pw (txd_ir) = 1.6 s at 115.2 kbit/s txd pulse width (mir) t pw (mir) 217 ns t pw (txd_ir) = 217 ns at 1.152 mbit/s txd pulse width (fir) t pw (fir) 125 ns t pw (txd_ir) = 125 ns at 4.0 mbit/s txd rise & fall times (optical) t r , t f 600 ns t pw (txd_ir) = 1.6 s at 115.2 kbit/s 40 ns t pw (txd_ir) = 125 ns at 4.0 mbit/s
6 electrical and optical specifications (cont?.) parameter symbol min. typ. max. units conditions ir led anode on-state voltage v on 2.19 v ir_i leda = 65 ma, (sir mode) (ir_leda) ir vled = 3.6 v, r = 13 ? , v i (txd) v ih ir led anode on-state voltage v on 2.22 v ir_i leda = 150 ma, (mir/fir mode) (ir_leda) ir vled = 3.6 v, r = 13 ? , v i (txd_ir) v ih remote control (rc) transmitter rc radiant intensity i eh 50 mw/sr rc_i leda = 250 ma, q 1/2 15 , txd_rc v ih , t a = 25 c rc viewing angle 2 q 1/2 30 60 rc peak wavelength l p 885 nm txd_rc logic levels high v ih iov cc - 0.5 iov cc v low v il 00.5v txd_rc input current high i h 0.02 1 av i v ih low i l -0.02 1 a0 v i v il rc led anode on-state voltage v on 2.08 v rc_i leda = 250 ma, (rc_leda) rc vled = 3.6 v, r = 3.9 ? , v i (txd_rc) v ih transceiver input current high i h 0.01 1 av i v ih low i l -1 -0.02 1 a0 v i v il supply current shutdown i cc1 1 av sd v cc - 0.5, t a = 25 c idle i cc2 2.0 2.9 ma v i(txd) v il , ei = 0 (standby) active i cc3 3.5 ma v i(txd) v il , ei = 10 mw/cm 2 notes: 4. an in-band optical signal is a pulse/sequence where the peak wavelength, l p , is defined as 850 nm l p 900 nm, and the pulse characteristics are compliant with the irda serial infrared physical layer link specification version 1.4. 5. for in-band signals 115.2 kbit/s where 9 w/cm 2 ei 500 mw/cm 2 . 6. for in-band signals 1.152 mbit/s where 22 w/cm 2 ei 500 mw/cm 2 . 7. for in-band signals 4 mbit/s where 22 w/cm 2 ei 500 mw/cm 2 . 8. latency is defined as the time from the last txd_irda light output pulse until the receiver has recovered full sensitivity. 9. receiver wake up time is measured from v cc power on to valid rxd_irda output. 10, transmitter wake up time is measured from v cc power on to valid light output in response to a txd_irda pulse. 11. the max optical pw is defined as the maximum time which the ir led will turn on. this is to prevent the long turn on time fo r the ir led.
7 waveform 1. rxd output waveform waveform 2. led optical waveform waveform 3. txd ?tuck on?protection waveform waveform 4. receiver wakeup time waveform waveform 5. txd wakeup time waveform timing waveforms t f v oh 90% 50% 10% v ol t pw t r t f led off 90% 50% 10% led on t pw t r t pw (max.) txd led rx light t rw rxd sd tx light t tw txd sd
8 ir mir/fir mode - vled_a vs iled 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 0 0.05 0.1 0.15 0.2 0.25 iled (a) vled_a (v) ir sir mode - radiant intensity vs iled 0 5 10 15 20 25 000.0e+0 20.0e-3 40.0e-3 60.0e-3 80.0e-3 100.0e-3 iled (a) radiant intensity (mw/sr) ir mir/fir mode - radiant intensity vs iled 0 10 20 30 40 50 60 70 0 0.05 0.1 0.15 0.2 0.25 iled (a) radiant intensity (mw/sr) ir sir mode - vled_a vs iled 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 000.0e+0 20.0e-3 40.0e-3 60.0e-3 80.0e-3 100.0e-3 iled (a) vled_a (v)
9 HSDL-3021 package dimensions 2.85 mounting center 4.0 1.025 unit: mm production tolerance: 0.2mm c l 2.5 4.0 8.0 2.05 2.55 rc emitter and irda emitter 0.35 0.65 0.80 c l 3.325 0.6 2.9 3.0 1.85 1.175 receiver 87654321 p 0.95 x 7 = 6.65 pin 1 pin 2 pin 3 pin 4 pin 5 pin 6 pin 7 pin 8 v led iov cc txdr rxd sd v dd txd rc gnd
10 HSDL-3021 tape and reel dimensions 16.4 + 2 0 21 0.8 unit: mm b c ? 13.0 0.5 2.0 0.5 2.0 0.5 label 3.4 0.1 8.4 0.1 8.0 0.1 4.0 0.1 1.5 0.1 7.5 0.1 16.0 0.2 1.75 0.1 ? 1.5 + 0.1 0 0.4 0.05 2.8 0.1 polarity pin 8: vled pin 1: gnd option # "b" "c" quantity 001 021 178 330 60 80 500 2500 empty parts mounted leader empty (40 mm min.) (400 mm min.) (40 mm min.) progressive direction r 1.0 detail a detail a unit: mm
11 HSDL-3021 moisture proof packaging all HSDL-3021 options are shipped in moisture proof package. once opened, moisture absorption begins. this part is compliant to jedec level 4. figure 3. baking conditions chart. recommended storage conditions storage temperature 10 c to 30 c relative humidity below 60% rh time from unsealing to soldering after removal from the bag, the parts should be soldered within three days if stored at the recom- mended storage conditions. when mbb (moisture barrier bag) is opened and the parts are exposed to the recommended storage conditions more than three days but less than 15 days, the parts must be baked before reflow to prevent damage to the parts. note: using the parts that are exposed for more than 15 days is not recommended. baking conditions package temp time in reels 60 c 48 hours in bulk 100 c 4 hours 125 c 2 hours note: baking should only be done once. units in a sealed moisture-proof package package is opened (unsealed) environment less than 30?, and less than 60% rh package is opened less than 72 hours perform recommended baking conditions no baking is necessary yes no no yes
12 process zone symbol d tm aximum d t/ d time or duration heat up p1, r1 25 c to 150 c3 c/s solder paste dry p2, r2 150 c to 200 c 100s to 180s solder reflow p3, r3 200 c to 260 c3 c/s p3, r4 260 c to 200 c-6 c/s cool down p4, r5 200 c to 25 c-6 c/s time maintained above >217 c 60s to 90s liquidus point, 217 c peak temperature 260 c time within 5 c of actual 20s to 40s peak temperature time 25 c to peak temperature 25 c to 260 c8 mins the reflow profile is a straight-line representation of a nominal temperature profile for a convective reflow solder process. the temperature profile is divided into four process zones, each with different d t/ d time temperature change rates, or duration. the d t/ d time rates, or duration, are detailed in the above table. the temperatures are measured at the component to printed circuit board connections. in process zone p1 , the pc board and HSDL-3021 pins are heated to a temperature of 150 c to activate the flux in the solder paste. the temperature ramp up rate, r1, is limited to 3 c per second to allow for even heating of both the pc board and HSDL-3021 pins. process zone p2 should be of sufficient time duration (100 to 180 seconds) to dry the solder paste. the temperature is raised to a level just below the liquidus point of the solder. process zone p3 is the solder reflow zone. in zone p3, the temperature is quickly raised above the liquidus point of solder to 260 c (500 f) for optimum results. the dwell time above the liquidus point of solder should be between 60 and 90 seconds. this is to assure proper coalescing of the solder paste into liquid solder and the formation of good solder connections. beyond the recommended dwell time, the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. the temperature is then rapidly reduced to a point below the solidus temperature of the solder to allow the solder within the connections to freeze solid. process zone p4 is the cool down after solder freeze. the cool down rate, r5, from the liquidus point of the solder to 25 c (77 f) should not exceed 6 c per second maximum. this limitation is necessary to allow the pc board and HSDL-3021 pins to change dimensions evenly, putting minimal stresses on the HSDL-3021. it is recommended to perform reflow soldering no more than twice. recommended reflow profile 0 t-time (seconds) t ?temperature ?( c) 230 200 150 120 80 50 150 100 200 250 300 180 217 255 p1 heat up p2 solder paste dry p3 solder reflow p4 cool down 25 r1 r2 r4 r5 60 sec.to 90 sec. above 217 c max. 260 c r3
13 appendix a: HSDL-3021 smt assembly application note solder pad, mask and metal stencil figure 1. stencil and pcba. recommended land pattern figure 2. metal stencil for solder paste printing land pattern pcba stencil aperture solder mask mounting center mounting center 1.25 1.75 0.475 1.425 0.35 0.10 0.775 fiducial 2.05 0.6 2.375 2.7
14 adjacent land keepout and solder mask areas adjacent land keepout is the maximum space occupied by the unit relative to the land pattern. there should be no other smd components within this area. the minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. it is recommended that two fiducial crosses be placed at recommended metal solder stencil aperture it is recommended that only a 0.152 mm (0.006 inch) or a 0.127 mm (0.005 inch) thick stencil be used for solder paste printing. this is to ensure adequate printed solder paste volume and no shorting. see table 1 below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. aperture opening for shield pad is 3.05 mm x 1.1 mm as per land pattern. figure 3. solder stencil aperture. table 1. aperture size(mm) stencil thickness, t (mm) length, l width, w 0.127 mm 1.75 0.05 0.55 0.05 0.11 mm 2.4 0.05 0.55 0.05 apertures as per land dimensions l w t mid length of the pads for unit alignment. note: wet/liquid photo-imaginable solder resist/mask is recommended. h l j k solder mask dimension h l k j mm 0.2 3.0 3.85 10.1
15 appendix b: pcb layout suggestion the effects of emi and power supply noise can potentially reduce the sensitivity of the receiver, resulting in reduced link distance. the pcb layout played an important role to obtain a good psrr and em immunity resulting in good electrical performance. things to note: 1. the ground plane should be continuous under the part, but should not extend under the shield trace. 2. the shield trace is a wide, low inductance trace back to the system ground. cx1, cx2, cx3, cx4 and cx5 are optional supply filter capacitors; they may be left out if a clean power supply is used. 3. vled can be connected to either unfiltered or unregulated power supply. the bypass capacitors should be connection before the current limiting resistor r2 respectively. in a noisy environment, including capacitor cx3and cx4 can enhance supply rejection. cx3 that is generally a ceramic capacitor of low inductance providing a wide frequency response while cx4 is tantalum capacitor of big volume and fast frequency response. the use of a tantalum capacitor is more critical on the vled line, which carries a high current. 4. v cc pin can be connected to either unfiltered or unregulated power supply. the resistor, r1 together with the capacitors, cx1 and cx2 acts as the low pass filter. 5. iov cc is connected to the asic voltage supply or the vcc supply. the capacitor, cx5 acts as the bypass capacitor. 6. preferably a multi-layered board should be used to provide sufficient ground plane. use the layer underneath and near the top layer: connect the metal shield and module ground pin to bottom ground layer; place the bypass capacitors within 0.5 cm from the v cc and ground pin of the module. layer 2: critical ground plane zone. 3 cm in all directions around the module. connect to a clean, noiseless ground node (e.g., bottom layer). layer 3: keep data bus away from critical ground plane zone. bottom layer: ground layer. ground noise <75 mvp-p. should be separated from ground used by noisy sources. transceiver module as vcc, and sandwich that layer between ground connected board layers. the diagram below demonstrate an example of a 4 layer board:
16 the area underneath the module at the second layer, and 3 cm in all directions around the module, is defined as the critical ground plane zone. the ground plane should be maximized in this zone. top layer bottom layer layer 3 layer 3 top layer cx4 cx3 cx5 cx2 r 2 r 1 bottom layer (gnd) legend: ground via noise sources to be placed as far away from the transceiver as possible cx1 refer to application note an1114 or the avago irda data link design guide for details. the layout below is based on a 2-layer pcb.
17 appendix c: general application guide for the HSDL-3021 infrared irda compliant 4 mb/s transceiver description the HSDL-3021, a wide-voltage operating range infrared transceiver is a low-cost and small form factor device that is designed to address the mobile computing market such as pdas, as well as small embedded mobile products such as digital cameras and cellular phones. it is spectrally suited to universal remote control transmission function at 940 nm typically. it is fully compliant to irda 1.4 low power specification up 4mb/s and support most remote control codes. the design of HSDL-3021 also includes the following unique features : spectrally suited to universal remote control transmission function at 940 nm typically low passive component count shutdown mode for low power consumption requirement direct interface with i/o logic circuit selection of resistor r2 resistor r2 should be selected to provide the appropriate peak pulse ir and rc led current respectively at different ranges of v cc as shown on page 3 under ?ecommended application circuit components. interface to the recommended i/o chip the HSDL-3021? txd data input is buffered to allow for cmos drive levels. no peaking circuit or capacitor is required. data rate from 9.6 kb/s to 4 mb/s is available at rxd pin. the txd_rc, pin 7, together with leda, pin1, is used to select the remote control transmit mode. alternatively, the txd_ir, pin 3, together with leda, pin 1, is used for infrared transmit selection. following shows the hardware reference design with HSDL-3021. *detailed configuration of hsdl- 3021 with the controller chip is shown in figure 3. the use of the infrared tech- niques for data communication has increased rapidly lately and almost all mobile application processors have built in the ir port. this does away with the external endec and simplifies the interfacing to a direct connection between the processor and the transceiver. the next section discusses interfacing configuration with a general processor. figure 2: mobile application platform. logic bus driver memory expansion rom flash sdram mobile application chipset irda interface ac97 sound baseband controller i2s touch panel audio input power management pcm sound lcd backlight panel antenna stn/tft lcd panel key pad lcd control peripherial interface pwm a/d memory i/f *HSDL-3021
18 general mobile application processor the transceiver is directly interfaced with the microprocessor provided its support infrared communication commonly known as infrared communications port (icp). the icp supports both sir data rates up to 115.2 kps and sometimes fir data with data rates up to figure 3: HSDL-3021 configuration with general mobile architecture processor. 4m bps. the remote control commands can be sent to one of the available general purpose io pins or the uart block with irda functionality. it should be observed that although both irda data transmission and remote control transmission is possible simultaneously by the hardware, the software is required to resolve this issue to prevent the mixing and corruption of data while being transmitted over the free air. the above figure 3 illustrates a reference interfacing to implement both ir and rc functionality with HSDL-3021. v cc v cc gnd HSDL-3021 iov cc txd_rc cx5 gnd gnd cx3 cx4 cx1 cx2 r3 vled gnd gnd r1 rxd sd txd_ir iov cc iov cc gpio 100 k w gnd 100 k w ir_rxd gpio ir_txd vleda
19 remote control operation the HSDL-3021 is spectrally suited to universal remote control transmission function at 940 nm typically. remote control applications are not governed by any standards, owing to which there are numerous remote codes in market. each of those standards results in receiver modules with different sensitivities, depending on the carrier frequencies and responsively to the incident light wavelength. remote control carrier frequencies are in the range of 30 khz to 60 khz (for details of some the frequently used carrier frequencies, please refer to an1314). some common carrier frequencies and the corresponding sa-1110 uart frequency and baud rate divisor are shown in table 3. table 3. remote control carrier sa-1110 uart frequency (khz) frequency (khz) baud rate divisor 30 28.8 8 32, 33 32.9 7 36, 36.7, 38, 39.2, 40 38.4 6 56 57.6 4
20 window design to insure irda compliance, there are some constraints on the height and width of the optical window. the minimum dimensions ensure that the irda cone angles are met, and there is no vignetting, and the maximum dimensions ensure that the effects of stray light are minimized. the minimum size corresponds to a cone angle of 30 degrees, the maximum to a cone angle of 60 degrees. the drawing below shows the module positioned in front of a window. x is the width of the window, y is the height of the window, and z is the distance from the HSDL-3021 to the back of the window. the distance from the center of the led lens to the center of the photodiode lens is 5.1 mm. the equations that determine the size of the window are as follows: x = 5.1 + 2(z + d) tan q y = 2(z + d) tan q where q is the required half angle for viewing. for the irda minimum, it is 15 degrees, for the irda maximum it is 30 degrees. (d is the depth of the led image inside the part, 3.17 mm.) these equations result in the following tables and graphs: minimum and maximum window sizes dimensions are in mm. depth (z) y min. x min. y max. x max. 0 1.70 6.80 3.66 8.76 1 2.23 7.33 4.82 9.92 2 2.77 7.87 5.97 11.07 3 3.31 8.41 7.12 12.22 4 3.84 8.94 8.28 13.38 5 4.38 9.48 9.43 14.53 6 4.91 10.01 10.59 15.69 7 5.45 10.55 11.74 16.84 8 5.99 11.09 12.90 18.00 9 6.52 11.62 14.05 19.15 10 7.06 12.16 15.21 20.31 window height y vs. module depth z window width x vs. module depth z y x z window height y ?mm 16 module depth z ?mm 6 48 0 2 14 010 10 26 12 8 4 acceptable range window width x ?mm 22 module depth z ?mm 12 48 6 8 20 010 16 26 18 14 10 acceptable range
21 for the modules depth values that are not shown on the tables above, the minimum x and y values can be interpolated. x min. aperture width (x) ?mm module depth (z) ?mm aperture width (x) vs. module depth 14 4 0 02 6 6 135 10 2 4 8 12 18 16 y min. aperture height (y) ?mm module depth (z) ?mm aperture height (y) vs. module depth 7 4 0 02 6 3 135 5 1 2 4 6 10 9 8 window material almost any plastic material will work as a window material. polycarbonate is recommended. the surface finish of the plastic should be smooth, without any texture. an ir filter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10% or less for best optical performance. light loss should be measured at 875 nm. the recommended plastic materials for use as a cosmetic window are available from general electric plastics. recommended plastic materials: material # light transmission haze refractive index lexan 141 88% 1% 1.586 lexan 920a 85% 1% 1.586 lexan 940a 85% 1% 1.586 note: 920a and 940a are more flame retardant than 141. recommended dye: violet #21051 (ir transmissant above 625 mm)
22 shape of the window from an optics standpoint, the window should be flat. this ensures that the window will not alter either the radiation pattern of the led, or the receive pattern of the photodiode. if the window must be curved for mechanical or industrial design reasons, place the same curve on the backside of the window that has an identical radius as the front side. while this will not completely eliminate the lens effect of the front curved surface, it will significantly reduce the effects. the amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. the following drawings show the effects of a curved window on the radiation pattern. in all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. flat window (first choice) curved front, flat back (do not use) curved front and back (second choice)
23 appendix e: general application guide for the HSDL-3021 remote control drive modes the HSDL-3021 can operate in the single-txd programmable mode or the two-txd direct transmission mode . single-txd programmable mode in the single-txd programmable mode, only one input pin (txd_ir input pin) is used to drive the led in both irda mode as well as remote control mode of operation. this mode can be used when the external controller uses only one transmit pin for both irda as well rc mode of operation. the transceiver is in default mode (irda-sir) when powered up. the user needs to apply the following programming sequence to both mode programming timing table parameter symbol min typ max unit notes the following timings describe input constraints required using the active serial interface for mode programming with pins sd, txir, and txrc: shutdown input pulse width, t sdpw 30 - ? s will activate complete shutdown at pin sd sd mode setup time t a 200 - - ns setup for mode programming txir pulse width for rc mode t b 200 - - ns rc drive enabled with pin txir sd programming pulse width t c --5.0 s pulse width mode programming note: ( t a + t b ) < t c < t sdpw txir setup time for t s 50 - - ns setup time for irda bandwidth selection sir or mir/fir mode txir or sd hold time to latch t h 50 - - ns hold time for irda or rc modes sir, mir/fir or rc mode the txd_ir and sd inputs to enable the transceiver to operate in either the irda or remote control mode. drive irda led drive rc led drive irda led shutdown shutdown (active high) tx i r (active high) t xrc (gnd) reset t c t h t h t tl rc mode t b t a t c t h ? ? ? ? ?
24 two-txd direct transmission mode in the two-txd direct transmission mode, the led can be driven separately for irda and rc mode of operation through the txd_ir and txd_rc pins respectively. this mode can be used when the external controller utilizes separate transmit pins for irda and rc operation modes, thereby eliminating the need for external multiplexing. please refer to the transceiver i/o truth table for more detail. transceiver control i/o truth table for two-txd direct transmission mode sd txir txrc led remarks 000 off ir rx enabled. idle mode 001on remote control operation 010on irda tx operation 011- not recommended (both transmitters off) 100 off shutdown mode* *the shutdown condition will set the transceiver to the default mode (irda-sir) bandwidth selection timing the power on state should be the irda sir mode. the data transfer rate must be set by a program- ming sequence using the txd_ir and sd inputs as described below. note: sd should not exceed the maximum, t c 5 s, to prevent shutdown. setting to the high bandwidth mir/fir mode (0.576 mbits/s to 4 mbits/s) 1. set sd input to logic ?igh. wait t a 200 ns. 2. set txd_ir input to logic ?igh.?wait t s 50 ns. 3. set sd to logic ?ow?(this negative edge latches state of txd_ir, which determines speed setting). 4. after waiting t h 50 ns txd_ir can be set to logic ?ow.?txd_ir is now re- enabled as normal irda transmit input for the high bandwidth mir/fir mode. setting to the low bandwidth sir mode (2.4 kbits/s to 115.2 kbits/s) 1. set sd input to logic ?igh. 2. set txir input to logic ?ow.?wait t s 50 ns. 3. set sd to logic ?ow?(this negative edge latches state of txir, which determines speed setting). 4. txir must be held for t s 50 ns. txir is now re-enabled as normal irda transmit input for the low bandwidth sir mode. 50% 50% sd txir t c 50% 50% high: mir/fir low: sir t h t s t a
25 power-up sequencing to have a proper operation for hsdl-3201, the following power-up sequencing must be followed. a) it is strongly recommended that v cc must come prior to iov cc . b) it is not recommended to turn on iov cc before v cc while sd is low. however, for application that iov cc comes prior to v cc while sd is low, sd pin has to be set high to assure proper functionality. v cc t iov cc dl 0 s t sddl 30 s t sdpw 30 s iov cc sd v cc t sddl 30 s t sdpw 30 s iov cc sd v cc iov cc sd note: t iov cc dl = iov cc delay time t sddl = sd delay time t sdpw = shutdown input pulse width c) setting iov cc high before v cc while sd is high is forbidden.
for product information and a complete list of distributors, please go to our website: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies limited in the united states and other countries . data subject to change. copyright ?2007 avago technologies limited. all rights reserved. obsoletes av01-0697en av02-0229en march 16, 2007

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